a high dynamic range digitally-controlled oscillator (dco) for all-digital pll systems

نویسندگان

samira jafarzade

abumoslem jannesari

چکیده

in this paper, a new high dynamic range digitally-controlled oscillator (dco) for all-dpll systems is proposed. the proposed dco is based on using a δς modulator as a digital-to-analog converter. using δς dac can provide a very high resolution (18-bit) control on the dco. the δς dac output is a 2-level pulse signal that needs to be filtered for cancelling the out of band shaped noise. the used δς modulator is a 4th order mash δς modulator working with the osr of 128 and the sampling frequency of 450mhz. the proposed dco is used in a pll to synthesize the frequency in the range of 1700mhz to 1800mhz for gsm-1800 application. the achieved phase noise for this pll based synthesizer in whole the range is -115 dbc/hz at the offset frequency of 500 khz. the designed adpll including the dco is simulated in ads with 0.18µm cmos technology.

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A High Dynamic Range Digitally- Controlled Oscillator (DCO) for All-Digital PLL Systems

In this paper, a new high dynamic range DigitallyControlled Oscillator (DCO) for All-DPLL systems is proposed. The proposed DCO is based on using a ΔΣ modulator as a Digital-to-Analog converter. Using ΔΣ DAC can provide a very high resolution (18-bit) control on the DCO. The ΔΣ DAC output is a 2-level pulse signal that needs to be filtered for cancelling the out of band shaped noise. The used Δ...

متن کامل

A Precise ΔΣ-based Digitally Controlled Oscillator (DCO) for All-Digital PLL

A Digitally Controlled Oscillator (DCO) for the frequency band of 1700-1900 MHz is presented. This architecture achieves a frequency resolution less than 1-kHz. The DCO is a part of an All-Digital Phase-Locked Loop (ADPLL) for GSM-1800 and GSM-900 applications implemented in a 0.18 μm CMOS process. In this architecture an 18-bit delta sigma digital to analog converter and a voltage controlled L...

متن کامل

A digitally controlled PLL for digital SOCs

A fully integrated digitally controlled PLL used as a clock multiplying circuit is designed and fabricated. The PLL has no off-chip components and it is made from standard cells found in most digital standard cell libraries. It is therefore portable between processes as an IP-block. Using a 0.35 μm standard CMOS process and a 3.0 V supply, the PLL has a frequency range of 152 MHz to 366 MHz and...

متن کامل

Digitally Controlled Oscillator (DCO)-Based Architecture for RF Frequency Synthesis in a Deep-Submicrometer CMOS Process

A novel digitally controlled oscillator (DCO)-based architecture for frequency synthesis in wireless RF applications is proposed and demonstrated. It deliberately avoids any use of an analog tuning voltage control line. Fine frequency resolution is achieved through high-speed dithering. Other imperfections of analog circuits are compensated through digital means. The presented ideas enable the ...

متن کامل

A Low-Power Digitally Controlled Oscillator for All Digital Phase-Locked Loops

A low-power and low-jitter 12-bit CMOS digitally controlled oscillator (DCO) design is presented. The Low-Power CMOS DCO is designed based on the ring oscillator implemented with Schmitt trigger inverters. The proposed DCO circuit uses control codes of thermometer type to reduce jitters. Performance of the DCO is verified through a novel All Digital Phase-Locked Loop (ADPLL) designed with a uni...

متن کامل

Fast-locking all-digital phase-locked loop with digitally controlled oscillator tuning word estimating and presetting

Design of a fast-locking phase-locked loop (PLL) is one of the major challenges in today’s wireless communications. A recently reported digitally controlled oscillator (DCO)-based all-digital PLL (ADPLL) can achieve an ultrashort settling time of 10 ms. This study describes a new DCO tuning word (OTW) presetting technique for the ADPLL to further reduce its settling time. Estimating the require...

متن کامل

منابع من

با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید


عنوان ژورنال:
the modares journal of electrical engineering

ناشر: tarbiat modares university

ISSN 2228-527 X

دوره 12

شماره 2 2015

کلمات کلیدی

میزبانی شده توسط پلتفرم ابری doprax.com

copyright © 2015-2023